招聘人数：1 人
到岗时间：不限
性别要求：不限性别
婚况要求：不限婚况
岗位职责:
1.RTLsythesis,SDC/UPFverificatio,lowpowerdesigimplemetatioforadvacedtechologychips.
2.Desigflow/methodologydevelopmetadiovatioforfrot-eddesigchalleges.
3.BeresposibleforRTLverificatio,sythesis,lowpowerdesig,adSTA/timigclosureworksforcustomer’sprojectsaditeralsystemtestchips.任职要求:
1.MSoraboveiEE,CSrelatedfields.ExperieceiDigitalICdesigflow(fromSythesis,DFT,MBIST,Formality,STA),RTLdesig,RTLverificatioisplus.
2.Newgraduateor3yearsworkigexperiece.
3.FamiliarwithEECADtoolsuchasDesigcompiler,DFTcomplier,MBIST,-Lit,Verdi,Verilogtools/flows.
4.Familiarwithtcl/Perl/Pythoprogram.
求职提醒：求职过程请勿缴纳费用，谨防诈骗！若信息不实请举报。
